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Embedded · FPGA / SDR · 2026Verified

Multiplier-less BPSK Modulator (FPGA SDR)

Hardware-efficient BPSK modulator on Spartan-6: a single DDS core with phase-shift-via-XOR (no multipliers, no DSP48, no BRAM) feeding three backends — square wave, 8-bit parallel DAC, and 1-bit sigma-delta. Pipelined for Fmax headroom. Self-checking testbench demodulates 59 bits over 100 carrier periods with zero errors.

Academic / local — walkthrough available on request

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VerilogFPGADDSSDRIcarus VerilogXilinx ISE